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Propeller network layout for RasPi accessory

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Four Propellers... 64 user-GPIO pins... 1MB distributed SQI SRAM... Dynamic clock modulation...

... makes for a lot of head-scratching and frowning.

I've been roughing out a design for a PCB that has all of the above features.  Nothing particularly complex in it's intrinsic form but may lead to some quite interesting possibilities for those interested in high-speed signalling or even RF modulation (HAM radio).

Here's a simplified sketch of the Propeller network...

Here we have "M" (master) which talks directly to the RasPi and coordinates the three slave Propellers.  M controls the startup sequence for S0, S1 and S2 and also acts as a system watchdog, able to reset each slave if required.

All 4 Propellers have 16 GPIO pins exposed via male 0.1" headers, up to 256KB of SQI SRAM, and I2C access to the 256KB EEPROM.

Not many pins left now, 2 remaining unused on each slave, and the Master has none left.  Although I'm thinking of dropping the Master's GPIO exports down to 8 instead of 16 and gaining 8 more specific purpose pins for implementing some more cool features.

In any case I'm trying to make this a powerful board that concentrates on a good range of fast resources and the ability to generate high speed signalling on many pins simultaneously.  But each Propeller has a direct asynchronous connection to each other Propeller, so it will be possible to constuct some very complex systems with both high speed processing and high-resolution, low latency IPC channels.


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